Cyclone II-Exp.7 – the final straw
Now the code can be modularised in places, especially around the register rotation … … but I think we’ve had enough fun with these and we can move on.
Note that we have a 4 bit or 16 count cycle for the led display enable cycle because there are 7-segments +plus 1 decimal place (that’s 8) ;and each LED (segment and DP) is turned on for a second and off for a second. Therefore (7+1)*2=16.
The other thing will be, when you compile, a bunch of errors will occur first up because the pin allocation is not correct … yet. Just go into the “Pin Allocation” dialog. Use, of course:
Take note, I could not get the tool to accept the NULL or empty entry for the “led_bit” group – so I thought it safe to set it to the group the pins sat in, seemed to work. However, I do note that the “Output Group” of the “dataout” group was not set – this was part of the original project. It is likely a sequence thing, who knows?? Just another thing to chase down in background.
It does seem that it was a problem caused because we changed the OUTPUT from a single bit reg to an 8 bit reg and the various tool bits had or are not synchronised. No problem, a few twiddles and it works.
RTL for this verilog looks like this:
And the Technology Map Viewer: