Archive for June, 2014


Posted in Altera Labs, Cyclone II Experiments on June 30, 2014 by asteriondaedalus

Final LAB with all 6 parts tackled DL-L1.

Getting there

Posted in DSP, DSP Laboratory on June 29, 2014 by asteriondaedalus

Setting up (slowly) for experiments with the ADSP 21xx based ADMCF328 chips I grabbed of internet for cheap.

First step, set up to program them from serial line.

Based on the manual for the ADMCF32X PROCESSOR BOARD we need opto couplers between the RS232 line and the ADMCF328 for some dang blasted reason.

So, rather than go feral, I pieced together the actual chips from the board from the time machine of the internet.

Let's not stray too far from the original - for now

Let’s not stray too far from the original – for now


So, I will use my CPLD board to generate a 10MHz clk signal, rather than fiddle with a crystal.  For the moment I am going to go without the NME0505S although the mixing of analogue and digital gnd may be a little fiddly.  Although, this was inherited because I elected to go with the AD7306BR (an hence the opto couplers).   It may have made more sense to go with a MAX232 or similar.

The initial experiments will be LED lighting and driving my LogicSniffer by the PWM pins.

Python plus FPGA!

Posted in FPGA, Python RULES! on June 24, 2014 by asteriondaedalus

Would you believe myHDL  project that runs python (or a subset of python code) on an FPGA – pyCPU.

So far, I have tried the example  The software hangs (somewhat) but appears to generate a  couple of vhdl files that compile without error.

Not a lot of useful documentation but interesting enough to poke around with.

No luck with Migen as the Python 3.4 installer keeps failing on my machine grrrrrrrrr.


DSP oi, oi, oi, DSP … done that already have I?

Posted in DSP, DSP Laboratory on June 10, 2014 by asteriondaedalus

Author/lecturer has made his text on digital signal processing available online here.

The wild thing, he has a lab book based on the ADSP 2181 EZKIT LITE, aka:



I am so rusty after a decade or more so this is perfect.

Also wik, I got a half dozen SOIC28 to DIP28 breakouts and worked out my soldering is out of practice, my $400 prescription glasses are no good for close work, my 10x magnifying lamp distorts my vision, and the pads on the breakouts are tinned so I need only sweat the pins and don’t need to add solder per se – to the SOIC chip at least.  I do also need a new tip for soldering iron and a new roll of de-soldering wick.  All lame excuses for a shoddy soldering job lol.

Why buy a DIP package?

Why buy a DIP package?

I have to set this up for flashing LED to sort out getting code onto the chip.  I may not be able to flash the on board FLASH as the flash utility seems to be the only dang blasted tool to require a licence – all the others run fine.

So I can make prom code and do likely load serially with a little playing so a test run to get the LED flashing on the EZ-LITE board and then wiring something up on the breadboard.

Still looking for a way to cheaply program AT17LV65 or AT17C65 to set up for EEPROM boot – eventually.  I might be able to use an Arduino (my Mega1280 perhaps).

DSP soic soic soic DSP soic soic soic they’re dynomite

Posted in cheap obsolete tech, Hardware on June 7, 2014 by asteriondaedalus
Motor control DSP chips

Motor control DSP chips

So I splurged and go a strip of the admcf32x.

There was an option for DIP version but I just got a small bag of SOIC28 adapters for the prototyping on breadboards. I have already added the chips to my Eagle library for later.

There is a little work to sort out programming them.  I found assembler, linker and prom exe off the internet (go figure someone kept a copy on a website) so it’s just sorting a UART interface for the prototyping. The fun one is the EEPROM boot mode, plenty of aftermarket EEPROM chips but no-one seems to have a programmer for them expect for the manufacturer (which is $$$).  I came close on aliexpress but some vendors there are not technologists so you can’t get useful info out of many of them.

I might end up just using a CPLD – we have the tools.


Posted in Altera Labs, Cyclone II Experiments on June 6, 2014 by asteriondaedalus

I am working through the Altera(r) labs.

VHDL Digital Logic Lab One so (far) at: DL-L1